Job Description

Title: Productivity Engineer

Day-to-Day:

• Support the strategy, processes, tools, and organization for the development of a strong Coatings and Productivity Core Technology Center (CPCTC).
• Apply knowledge of semiconductor capital equipment requirements, industry coating techniques/BKMs, and coating materials to enhance the performance of existing and new products.
• Work with global coating vendors to develop innovative coating solutions that provide differentiation.
• Work with academic institutions to develop innovative materials science engineering solutions that provide differentiation.
• Support the establishment of a methodology for engineering DOEs and development/qualification of coating materials.
• Solve materials engineering challenges related to the chemical, physical and thermal aspects of processes to improve the performance of equipment parts.
• Communicate the progress and status of ongoing technical activities to management.
• Support preparation of design reviews for the development team.
• Work with Engineering teams to ensure the clarity of engineering drawing requirements related to part coatings.

APPLY IF:

• You have a PhD with > 2 years of industry experience in Productivity, process engineering, materials science, material engineering or materials chemistry, with focus on hands-on experimental work

Must Haves:

• Expertise in failure analyzing various ceramic materials, metals, quartz and coated parts.
• Expertise in failure analyzing plasma and/or thermal CVD/ALD semiconductor reactor components (e.g., chamber wall liner, gas distribution showerheads, electrostatic chucks, wafer lift mechanisms, bellows, etc.).
• Expertise in the areas of materials science and engineering of various coating processes, such as plasma spray, ion assisted deposition, ALD, CVD, PVD, etc.
• Expertise in material analysis and characterization (SEM, TEM, ICP-MS, EDX)
• Expertise in corrosion and erosion mechanisms of semiconductor production chamber parts.
• Expertise in solving particle and contamination problems in semiconductor process chambers.
• Experience in running wafer marathons as a means of monitoring and ultimately solving particle and contamination problems in semiconductor process chambers.

Plusses:

• Understanding and use of various problem-solving methodologies, such as Lean Six Sigma, Ishikawa Diagram, 8D, TRIZ etc.
• Knowledge of DOE methodology.
• Ability to mentor and train junior colleagues.
• Knowledge of cleaning of various ceramic materials, metals, quartz and coated parts.
• Experience working with vendors and academic institutions.
• Familiarity with additive manufacturing.

Salary: 150k – 200k/yr

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